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patent application Ser. No. 15/594,518. FIG. 3A is a block diagram illustrating the server system 164 in accordance with some implementations. The server system 164 typically includes one or more processing units CPUs 302, one or more network interfaces 304 e. g. , including an I/O interface to one or more client devices and an I/O interface to one or more electronic devices, memory 306, and one or more communication buses 308 for interconnecting these components sometimes called a chipset. The memory 306 includes high speed
random access memory, such as DRAM, SRAM, DDR SRAM, or other random access solid
state memory devices; and, optionally, includes non volatile memory, such as one or more magnetic disk storage devices, one or more optical disk storage devices, one or more flash memory devices, or one or more other non volatile solid state storage devices. The memory 306, optionally, includes one or more storage devices remotely located from one or more processing units 302. The memory 306, or alternatively the non volatile memory within memory 306, includes a non transitory computer readable storage medium.
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